Thierry Delafontaine
Thierry Delafontaine
ZHAW
School of Engineering
Forschungsschwerpunkt High Performance Embedded Platforms
Technikumstrasse 20/22
8400 Winterthur
Projekte
- Novel AFM Techniques for Autonomous Quality Control in Industrial Manufacturing / Teammitglied / laufend
- Reconfigurable Heterogeneous Highly Parallel Processing Platform for safe and secure AI / Teammitglied / laufend
- Scalable AV Platform for Edge AI Computing / Teammitglied / abgeschlossen
- Novel high-speed, low latency distributed data link for precision measurement systems in demanding environments / Teammitglied / abgeschlossen
Publikationen
Schriftliche Konferenzbeiträge, peer-reviewed
- Delafontaine, T., & Rosenthal, M. (2024). Efficient mapping of neural networks on FPGA with generated HDL code [Conference paper]. Proceedings of the 2024 Embedded World Conference, 518–521. https://doi.org/10.21256/zhaw-32431
- Delafontaine, T., & Rosenthal, M. (2021, May). Secure boot concept on the Zynq Ultrascale+ MPSoC. Embedded World Conference 2021, Online, 1.-5. März 2021. https://doi.org/10.21256/zhaw-23966
Mündliche Konferenzbeiträge und Abstracts
Delafontaine, T., & Rosenthal, M. (2023, October 17). Efficient mapping of neural networks on FPGA with generated VHDL code. European Conference on EDGE AI Technologies and Applications – EEAI, Athens, Greece, 17-19 October 2023.