Thierry Delafontaine
Thierry Delafontaine
ZHAW
School of Engineering
Forschungsschwerpunkt High Performance Embedded Platforms
Technikumstrasse 20/22
8400 Winterthur
Projects
- Novel AFM Techniques for Autonomous Quality Control in Industrial Manufacturing / Team member / ongoing
- Reconfigurable Heterogeneous Highly Parallel Processing Platform for safe and secure AI / Team member / ongoing
- Scalable AV Platform for Edge AI Computing / Team member / completed
- Novel high-speed, low latency distributed data link for precision measurement systems in demanding environments / Team member / completed
Publications
Written conference contributions, peer-reviewed
- Delafontaine, T. and Rosenthal, M. (2024) 'Efficient mapping of neural networks on FPGA with generated HDL code', in Proceedings of the 2024 Embedded World Conference. WEKA, pp. 518–521. doi: 10.21256/zhaw-32431.
- Delafontaine, T. and Rosenthal, M. (2021) 'Secure boot concept on the Zynq Ultrascale+ MPSoC', in Embedded World Conference 2021, online, 1.-5. März 2021. ZHAW Zürcher Hochschule für Angewandte Wissenschaften. doi: 10.21256/zhaw-23966.
Oral conference contributions and abstracts
Delafontaine, T. and Rosenthal, M. (2023) 'Efficient mapping of neural networks on FPGA with generated VHDL code', in European Conference on EDGE AI Technologies and Applications – EEAI, Athens, Greece, 17-19 October 2023.