Thierry Delafontaine

Thierry Delafontaine
ZHAW
School of Engineering
Technikumstrasse 20/22
8400 Winterthur
Projects
- Novel AFM Techniques for Autonomous Quality Control in Industrial Manufacturing / Team member / ongoing
- Reconfigurable Heterogeneous Highly Parallel Processing Platform for safe and secure AI / Team member / ongoing
- Scalable AV Platform for Edge AI Computing / Team member / completed
- Novel high-speed, low latency distributed data link for precision measurement systems in demanding environments / Team member / completed
Publications
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Delafontaine, Thierry; Rosenthal, Matthias,
2024.
Efficient mapping of neural networks on FPGA with generated HDL code[paper].
In:
Proceedings of the 2024 Embedded World Conference.
Embedded World Conference, Nuremberg, Germany, 9-11 April 2024.
WEKA.
pp. 518-521.
Available from: https://doi.org/10.21256/zhaw-32431
-
Delafontaine, Thierry; Rosenthal, Matthias,
2021.
Secure boot concept on the Zynq Ultrascale+ MPSoC[paper].
In:
Embedded World Conference 2021, online, 1.-5. März 2021.
ZHAW Zürcher Hochschule für Angewandte Wissenschaften.
Available from: https://doi.org/10.21256/zhaw-23966
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Delafontaine, Thierry; Rosenthal, Matthias; et al.,
2023.
Efficient mapping of neural networks on FPGA with generated VHDL code.
In:
European Conference on EDGE AI Technologies and Applications – EEAI, Athens, Greece, 17-19 October 2023.