System on Chip Design
This technology combines microprocessors, function-specific peripheral or codec components and, usually, a field-programmable gate array on one single silicon chip. This makes it possible to manufacture extremely powerful, flexible and cheap systems with high data processing and data transmission speeds. The focus of the InES’s work in this key area is on the interaction between hardware and software within SoCs, with particular emphasis on the architecture, design and programming of SoCs with freely programmable logic.
Embedded High Performance Multimedia Blog
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Jamulus-Direct low latency music performance application for RaspberryPi 4
The Institute of Embedded Systems (InES) High Performance Multimedia group generated a low latency version of the classic Jamulus music rehearsal application for the Raspberry Pi 4 The classic ...
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Nvidia Xavier-AGX Multimedia Prototyping System
The Institute of Embedded Systems (InES) at ZHAW, with great experience in hardware development for NVIDIA computing modules, developed a rapid prototyping system for the NVIDIA Xavier AGX. To ...
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Linux Driver for the LT6911UXC HDMI to MIPI CSI-2 Converter
The ZHAW Institute of Embedded Systems (InES), High Performance Multimedia Group, developed a 4k video for Linux driver for the Lontium LT6911UXC HDMI to MIPI CSI-2 converter IC.The driver was written ...
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Secure Boot Concept for the Zynq Ultrascale+ MPSoC
The complexity of today’s multiprocessor System-on-Chip (MPSoC) can lead to major security risks in embedded designs, as the available security functions are often not or insufficiently utilized. ...
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Linux Driver for TI DS90UB95x FPD-Link III serializer and deserializer
The Institute of Embedded Systems at ZHAW developed a driver for the deserializer DS90UB954 and serializer DS90UB953 from Texas Instruments. The driver was tested on the RaspberryPi 4, NVIDIA Nano ...
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Power over Coax FPD-Link III Link Streaming Adapter for Raspberry PI CSI-Interface
The Institute of Embedded Systems at ZHAW has developed an open source adapter which allows streaming of a CSI-2 Camera interface to a Raspberry Pi. This allows connecting cameras with CSI interface ...
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Deep Learning for Classifying Food Waste
Amin MazloumianHans-Joachim GelkeMatthias Rosenthal Institute of Embedded Systems Zurich University of Applied Sciences Zurich, Switzerland amin.mazloumian@zhaw.ch One third of food produced in ...
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Artificial Intelligence on Microcontrollers
Using artificial intelligence algorithms, specifically neural networks on microcontrollers offers several possibilities but reveals challenges: limited memory, low computing power and no operating ...
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ZNNN the Framework to Port Neural Networks to FPGA
BY TOBIAS WELTI AND HANS-JOACHIM GELKE Due to their hardware architecture, Field Programmable Gate Arrays (FPGAs) are optimally suited for the execution of machine learning algorithms. These ...
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Interfacing FPD-Link III to a x86-PC via PCI Express
FPD-Link III tp PCIe Interface A computer with a GPU combined with an FPGA is a powerful tool for high speed video processing. An FPGA can preprocess multiple video streams in realtime and then ...
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Direct communication between FPGA and GPU using Frame Based DMA (FDMA)
By Philipp Huber, Hans-Joachim Gelke, Matthias Rosenthal GPUs with their immense parallelization are best fitted for real-time video and signal processing. However, in a real-time system, the ...
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IntEdgPerf: A new AI benchmark for embedded processors
IntEdgPerf is a new benchmark for running machine learning algorithms on embedded devices. It was developed at the Institute of Embedded Systems (InES) at the Zürich University of Applied Sciences. ...
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Machine learning on Cortex-M4 using Keras and ARM-CMSIS-NN
We have developed a simple software to show how a custom keras model can be automatically translated into c-code. The generated c-code can, in combination with the ARM-CMSIS-NN functions, be used to ...
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HDMI2CSI now running on 28.2.1
The HDMI2CSI board for capturing 4K HDMI was ported to the latest release of L4T (28.2.1) including the bug fix in the Nvidia VI (see forum: [1], [2]). Major differences where adapted from L4T 28.1 to ...
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Multi-Channel I2S-Audio to MIPI-Camera Serial Interface (CSI) Converter FPGA-IP
The NVIDA Tegra Processors TX1/TX2 with their powerful GPUs are ideal for use in professional audio mixing consoles or audio video equipment. However, if multiple audio channels are required, the ...
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Boost your GStreamer pipeline with the GPU plugin
Embedded devices like the Nvidia Tegra X1/2 offer tremendous video processing capabilities. But often there are bottlenecks hindering you from taking advantage of their full potential. One solution to ...
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Open Source drivers for HDMI2CSI module updated to support TX1 and TX2
The HDMI2CSI board for capturing 4K HDMI now supports both TX1 and TX2. Video capturing is fully supported for resolutions up to 2160p30 on Input A and 1080p60 on Input B. Driver development will ...
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Redundant 4k Video Streaming via Several LTE Connections
The InES HPMM research group presents a concept for a mobile and redundant 4K video streaming over LTE networks. It combines powerful 4K video capturing and processing capabilities of dedicated ...
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MIPI CSI/DSI Interface for General Purpose Data Acquisition
Modern SoC devices offer high performance for data analysis and processing. In order to transfer accordingly high data rates, the choices for high speed general purpose interfaces are limited. The ...
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Low Latency, Highly Reliable Wireless Video Transmission to iPad
Institute of Embedded Systems, a research institute of Zurich University of Applied Sciences generated a reference design for a low latency, highly reliable wireless video transmission from a battery ...
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